Conventionally, an image pickup apparatus commercialized for consumer such as a digital still camera records an image signal to an attachable/removable external recording medium such as a memory card.
When recording an image signal to a recording medium, a digital still camera reduces the quantity of data by compressing the image signal and thus can record more image signals to one recording medium. In the digital still camera of this type, an image signal is compressed in conformity with a standard called JPEG (Joint Photographic Expert Group).
In compression of an image signal carried out in conformity with JPEG, discrete cosine transform (hereinafter referred to as DCT) processing is first performed to the image signal. Next, the image signal is quantized on the basis of a quantization table, which is a matrix table of quantization characteristic values in consideration of statistical characteristics and human auditory characteristics. Then, the quantized image signal is coded. As the coding, entropy coding is mainly performed.
This entropy coding is variable-length coding. The quantity of data after compressing an image signal of one frame is not constant but largely changes depending on the pattern of the image. That is, when an image signal is compressed in conformity with JPEG, the compression rate of an image signal of one frame largely changes depending on the pattern of the image. Therefore, when recording an image signal picked up by a digital still camera to a recording medium, the size of a region to be recorded changes depending on the image and it is difficult to guarantee a lower limit of the number of frames of images that can be recorded on one recording medium.
As a method for guaranteeing a lower limit of the number of frames of images that can be recorded on one recording medium, the compression rate may be controlled when the digital still camera compresses an image signal. Digital still cameras that can control the compression rate of an image signal may be, for example, a digital still camera disclosed in the Japanese Patent Laid-Open Publication No.H5-64143, a digital still camera disclosed in the Japanese Patent Laid-Open Application No.H9-326994 and the like.
Hereinafter, the digital still camera disclosed in the Japanese Patent Laid-Open Publication No.H5-64143 will be described. A digital still camera 100 disclosed in this publication has a lens 101, an image pickup element 102, a signal processing unit 103, a frame memory 104, a DCT circuit 105, a quantization circuit 106, a coding circuit 107, an interface 108, an activity calculation circuit 109, a coefficient addition/subtraction circuit 110, a quantization table 111, a bit allocation circuit 112, a counter circuit 113, an error detection circuit 114, a register 115, a comparison circuit 116, and a judgment circuit 117, as shown in FIG. 1. On the digital still camera 100, a memory card 118, which is a recording medium attachable to and removable from the digital still camera 100, is mounted.
In the digital still camera 100, first, incident light from an object that is made incident via the lens 101 forms an image on an image pickup surface of the image pickup element 102. The image formed on the image pickup surface is converted to an electric signal by the image pickup element 102. The image signal converted to the electric signal is supplied to the signal processing unit 103. The image signal is converted to a digital signal as color processing and analog/digital (A/D) conversions are performed in the signal processing unit 103. The image signal of one frame, which is now a digital signal, is temporarily recorded to the frame memory 104.
Next, the frame memory 104 divides the temporarily recorded image signal of one frame into, for example, blocks each consisting of 8×8 pixels, and supplies each block to the DCT circuit 105. The frame memory 104 supplies the temporarily recorded image signal of one frame twice in order to compress the image signal after deciding a necessary parameter for a series of compression coding processing, and further supplies the image signal of one frame at least once in order to control the compression rate of image data.
The image signal supplied for the first time from the frame memory 104 is DCT-transformed by the DCT circuit 105 and then supplied to the activity calculation circuit 109. The activity calculation circuit 109 finds the total quantity of activity of one image frame on the basis of the image signal supplied from the DCT circuit 105. The bit allocation circuit 112 decides bit allocation to luminance and color signals and finds a coefficient a.
The image signal supplied for the second time from the frame memory 104 is DCT-transformed by the DCT circuit 105 and then supplied to the quantization circuit 106, where quantization is performed in accordance with a quantization step calculated by arithmetic processing of the previously found coefficient a and data of the quantization table 111. In this case, the coefficient addition/subtraction circuit 110 does not perform arithmetic processing with respect to the coefficient a. Moreover, the image signal supplied for the second time from the frame memory 104 is DCT-transformed by the DCT circuit 105 and then supplied also to the activity calculation circuit 109. The activity calculation circuit 109 sequentially finds the quantity of activity of each block on the basis of the image signal supplied for the second time from the frame memory 104 and DCT-transformed by the DCT circuit 105, and finds ultimate bit allocation for each block based on the bit allocation decided in the first supply.
Next, the coding circuit 107 adjusts the quantity of coding bits in accordance with the bit allocation decided by the activity calculation circuit 109 and performs coding of the image signal supplied from the DCT circuit 105. The coded image signal (referred to as CMD1) is recorded to the memory card 118 via the interface 108, and at the same time, the quantity of data is measured by the counter circuit 113. The error detection circuit 114 detects the difference (referred to as DE1) between a predetermined value (i.e., maximum quantity of coded data of one frame of the image signal that can be recorded to the memory card 118, hereinafter referred to as maximum coded data quantity) and CMD1, and temporarily sets the difference to the register 115.
Next, the judgment circuit 117 judges whether compression processing should be performed again to the image signal on the basis of DE1 to control the compression rate or not. When the judgment circuit 117 judges that compression processing should be performed again to the image signal, it requests the frame memory 104 to supply the image signal for the third time. The digital still camera 100 performs compression processing to the image signal supplied for the third time from the frame memory 104.
However, when performing compression processing to the image signal outputted for the third time from the frame memory 104, the value of the coefficient a is changed by the coefficient addition/subtraction circuit 110. The magnitude of change and switching between addition and subtraction with respect to the coefficient a are decided and controlled by the judgement circuit 117 in accordance with the quantity of errors and the polarity. The polarity represents the relation between the quantity of data recorded on the memory card 118 and the maximum coded data quantity. When the quantity of data recorded on the memory card 118 is less than the maximum coded data quantity, the polarity is positive. When the quantity of data recorded on the memory card 118 is equal to or larger than the maximum coded data quantity, the polarity is negative.
The image signal (referred to as CMD2), quantized on the basis of the different coefficient a and then coded, is newly recorded to the memory card 118. When recording CMD2 to the memory card 118, a different area (referred to as MA2) from the area (referred to as MA1) where CMD1 is recorded is used. At the same time when CMD2 is recorded to the memory card 118, the counter circuit 113 measures the quantity of data of CMD2. Moreover, the error detection circuit 114 detects the difference (referred to as DE2) between a predetermined value and CMD2 and temporarily sets the difference to the register 115.
Then, the comparison circuit 116 compares DE1 with DE2 and selects a value that is smaller and has positive polarity. The judgment circuit 117 judges whether to perform compression processing again to the image signal to control the compression rate, on the basis of the difference value selected by the comparison circuit.
As described above, in the digital still camera 100 shown in FIG. 1, the compression rate is controlled by repeating compression processing to the image signal four, five, six, . . . times while changing the value of the coefficient a. Ultimately, in the digital still camera 100, an image signal having a data quantity more close to a desired value and having positive polarity is recorded to the memory card 118.
On the other hand, in the digital still camera disclosed in the Japanese Patent Laid-Open Application No.H9-326994, when a recordable area on a recording medium is equal to or less than a predetermined area, the compression rate is controlled by repeating compression processing of an image signal plural times while changing the value of a coefficient a, and an image signal having a data quantity closer to a desired value and having positive polarity is saved to the recording medium. In this digital still camera, as the compression rate of an image signal is controlled only when a recordable area on a recording medium is equal to or less than a predetermined area, it is possible to reduce the time for performing compression processing to the image signal and restrain the power consumption.
Meanwhile, provision of a low-cost digital still camera has been recently demanded. As a method for lowering the cost of a digital still camera, a necessary memory capacity for processing an image signal may be minimized without providing a frame memory. When no frame memory is provided, a digital still camera performs real-time compression processing to an image signal outputted from an image pickup element.
In the digital still camera having no frame memory, an image signal of one frame before compression processing cannot be temporarily recorded. In the digital still camera of this type, unlike the digital still camera 100 disclosed in the Japanese Patent Laid-Open Publication No.H5-64143, it is impossible to control the compression rate of an image signal by requesting the frame memory 104 to supply, plural times, an image signal before compression processing and performing compression processing plural times while changing the coefficient a.